PCI Subsystem IDs and PCI-to-PCI Bridge Devices
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Introduction
Plug and Play under the Microsoft Windows operating systems depends on valid non-zero values in the SID registers of PCI devices for the correct enumeration of these devices. For more information, see PCI Device Subsystem IDs and Windows. On power-managed APM or ACPI platforms, PCI devices are enumerated not only at power-on time but also each time the platform resumes from a suspended (deep system sleep) state. Some combinations of types of PCI-to-PCI bridges and PCI devices on the secondary bus of the bridge can crash Windows 98 because the valid SID register values are not retained in the devices on the secondary bus when the system is resumed from a suspended state.
This article explains how this problem is solved in Windows 2000 and later versions, a method that is also provided as a fix in Windows 98 Second Edition. However, this is not a problem that can be fixed unilaterally in the operating system. BIOS vendors, IHVs, and OEMs all have to be aware of this problem and take action to contribute to solving this problem.
Types of PCI Devices and PCI-to-PCI Bridges
A power-managed PCI device supports an extended capabilities list and, within the capabilities list, provides the PCI Power Management Interface registers. These register settings indicate to the operating system that the device supports D3. For more information, see Chapter 3 of the PCI Bus Power Management Interface Specification.
A power-managed PCI-to-PCI bridge is a type of power-managed PCI device with an additional Power Management Interface register setting that indicates that power is removed from the secondary bus; that is, the secondary bus goes into B3 when the PCI-to-PCI bridge device is programmed to D3. For more information, see section 3.2.5 of the PCI Bus Power Management Interface Specification.
A PCI-to-PCI docking bridge is a type of PCI-to-PCI bridge that the BIOS can detect and program.
A reset-resistant SID PCI device has SVID and SID registers that are still loaded with valid non-zero values after the device receives a PCI reset signal.
A reset-loading SID PCI device is one type of reset-resistant SID PCI device. It automatically reloads the SVID and SID values when it receives a PCI reset signal.
A non-reset-resistant SID PCI device has SVID and SID registers that lose their valid non-zero values when it receives a PCI reset signal. For example, older CardBus controller PCI devices are likely to be non-reset-resistant SID PCI devices.
A multifunction PCI device, for the purposes of this discussion, is an add-on card that has a PCI-to-PCI bridge with other PCI devices behind its secondary bus.
Problems with Power-Managed PCI-to-PCI Bridges and Windows 98
A problem has been seen with Windows 98 running on a platform with a power-managed PCI-to-PCI bridge when behind that bridge, on its secondary bus, is a reset-loading PCI device. The power management component of Windows 98 can put such a platform into Suspend. Upon resume, the Plug and Play component of Windows 98 may crash the system.
This occurs because the Windows 98 Plug and Play subsystem uses the following rule to reset the PCI-to-PCI bridges it finds on a platform: if this is the first time the bridge is being configured and it was not previously enabled, that is, both IO enable and MEM enable in the command register were clear, then reset the PCI-to-PCI bridge.
In other words, Windows 98 pulses the secondary reset signal on a PCI-to-PCI bridge only if the BIOS did not already enable it.
This has implications for a system Suspend state to Resume transition on a platform that has a power-managed PCI-to-PCI bridge when behind that bridge, on its secondary bus, is a reset-loading PCI device. Here's the sequence of events:
1. | Before Suspend, the reset-loading SID PCI device has valid SVID and SID register values. |
2. | The operating system puts the platform into a deep sleep with both the PCI-to-PCI bridge in D3 (that is, the secondary bus is in B3) and the device behind the secondary bus in D3. |
3. | On Resume, the operating system brings the PCI-to-PCI bridge secondary back to B0, then the device to D0. However, without receiving a PCI reset signal, the reset-loading SID PCI device no longer has valid values in its SVID and SID registers. |
4. | This forces the operating system to install a new device and then hard-remove the old device. |
5. | The result is typically a system crash because there are two instances of the same device. |
Possible Solutions Leading to Further Complications
It may appear that a fix to this problem is to have the operating system change the rule it uses to reset PCI-to-PCI bridges: Always reset all PCI-to-PCI bridges. However, always resetting all PCI-to-PCI bridges does not work because some PCI-to-PCI docking bridge devices quit operating when the secondary bridge is reset. When reset by the operating system, a PCI-to-PCI bridge that is a docking bridge and has non-reset-resistant PCI devices behind it would erase any values loaded into the SVID and SID registers of non-reset-resistant devices set earlier by the BIOS.
The essential problem is that the operating system has no way of distinguishing PCI-to-PCI bridges from multifunction PCI devices--add-on cards that have a PCI-to-PCI bridge with other PCI devices behind its secondary bus. The operating system does not know when a reset was done by the BIOS (whether APM or ACPI's PNP0A03 _PS0).
Resolution in Windows 2000 and Windows 98 Second Edition
In Windows 98 Second Edition, the rule is to reset a PCI-to-PCI bridge if it is the first time the bridge is being configured and the bridge was not previously enabled (that is, both IO enable and MEM enable in the command register were clear), or the bridge is in the D3 state (that is, the secondary bus is in B3).
This is the same rule Windows 2000 and later versions use to reset PCI-to-PCI bridges.
Call to action for PCI device designers, platform, BIOS vendors, and developers:
| • | The BIOS--whether an APM BIOS or an ACPI BIOS _PS0 method for PCI bus 0 (ACPI PNP0A03)--must contain code that does the following after B3 to B0 transitions:
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| • | All PCI add-on cards must use reset-resistant SID PCI devices. This is a requirement in the PC 98 FAQ for PCI SIDs and in PC 99. | ||||||
| • | PCI devices must not reprogram the SVID and SID register values when the device does a D3-to-D0 transition. The operating system needs to know that the device is still there and has not been replaced with another device, before applying the power management APIs on the card itself. Reprogramming the SVID and SID register values on the B3-to-B0 transition is acceptable because the operating system guarantees powering a bus before looking at what is behind it. | ||||||
| • | PCI-to-PCI bridges must cascade PCI reset signals in ways that ensure any non-power-managed PCI-to-PCI bridge will cascade the reset signal coming either from BIOS bus 0 reset (or docking bridge) or from a previous power-managed PCI-to-PCI bridge reset by the operating system. Specifically:
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| • | If you use a power-managed docking PCI-to-PCI bridge, you must have reset-resistant SID PCI devices in your docking station. Expect the operating system to reset such bridges, which erases any values loaded into the SVID and SID registers of non-reset-resistant devices set earlier by the BIOS. On ACPI-only platforms, non-reset-resistant devices can be used in the docking station if the _REG method loads valid non-zero values into the SVID and SID registers.
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