About

I’m a Principal Researcher in the Microsoft Azure Silicon Systems Futures Group and Reader in Informatics at the University of Edinburgh. My research interests include Post-Moore computing, optimizing compilers, hardware/software co-design, embedded systems, computer architecture and machine learning. I’m an active contributor to the LLVM open source project and serve on the steering committee for the IEEE/ACM International Conference on Code Generation and Optimization (CGO). I received my PhD in Computer Science from the University of Texas at Austin. For more information see my LinkedIn.

Publications

Other

  • PC Member, European LLVM Developer Meeting (EuroLLVM), 2019
  • Vice-Chair, Computer Architecture Track, IEEE International Conference on Parallel Processing (ICPP), 2019
  • PC Member, IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2014, 2016, 2019
  • PC Member, ACM Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2018, 2019
  • Steering Committee Member, IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2018
  • Workshops and Tutorials Chair, ACM Conference on Programming Language Design and Implementation (PLDI), 2017, 2018
  • Sponsorship Chair, IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2018
  • PC Member, Workshop on LLVM Performance, in conjunction with CGO, 2018
  • PC Chair, IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2017
  • External Reviewer, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2015, 2017
  • External Reviewer, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2017
  • PC Member, International European Conference on Parallel and Distributed Computing (EURO-PAR), 2017
  • Sponsorship Chair, ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2017
  • External Reviewer, IEEE/ACM International Symposium on Microarchitecture (MICRO), 2013, 2015, 2016
  • PC Member, IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2015
  • General Chair, IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2015
  • External Reviewer, IEEE/ACM International Symposium on Computer Architecture (ISCA), 2015
  • PC Member, Workshop on Architectural and Microarchitectural Support for Binary Translation (AMAS-BT), 2015
  • External Reviewer, ACM/EDAC/IEEE Design Automation Conference (DAC), 2014, 2015
  • PC Member, Workshop on Adaptive Self-tuning Computing Systems (ADAPT), 2014, 2015, 2016
  • Session Chair, IEEE Symposium on Performance Analysis of Systems and Software (ISPASS), 2014, 2015
  • PC Member, IEEE Symposium on Parallel and Distributed Processing with Applications (ISPA), 2014
  • External Reviewer, IEEE/ACM International Conference on Parallel Architectures and Compilation Techniques (PACT), 2005, 2012
  • PC Member, International Workshop On Cyber-Physical Systems, Networks, and Applications, 2011, 2012
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