Portrait of Andrew Putnam

Andrew Putnam

Principal Research Hardware Development Engineer


I am a Principal Research Hardware Design Engineer in the Microsoft Research Technologies (MSR-T) lab (formerly the eXtreme Computing Group (XCG)). My research interests focus on accelerating data center applications with novel hardware such as FPGAs, and on the design of energy-efficient computer architectures. At data center scales, every detail matters, and every improvement (and mistake) is magnified by orders-of-magnitude.

My most recent work has been as one of the founding members of the Microsoft Catapult project. I’ve developed customized computing architectures for FPGAs, written compilers and assemblers for those architectures, and handled board design, manufacturing, and testing. I’ve partnered with numerous research and product groups, both internal and external to Microsoft, to identify and solve tough and important problems that can’t be solved by incremental improvements.

My research runs the spectrum from the blue-skies exploration to nitty-gritty, practical engineering. I strongly believe in seeing promising research through to prototypes and possibly even production. I love to build hardware and systems, and through building I uncover answers to hidden problems — such as cost, power, and reliability — which conventional research cannot always address but that are critical to turning research into reality.


Project Catapult

Established: June 1, 2011

Researchers interested into utilizing Catapult - visit http://aka.ms/catapult-academic  Project Catapult is the technology behind Microsoft’s hyperscale acceleration fabric, and is at the center of a comprehensive set of investments Microsoft is making to build a supercomputing substrate that can accelerate our efforts in networking, security, cloud services and artificial intelligence. Our work in this area started in 2010 in response to: Stresses in the silicon ecosystem driven by diminishing rates of CPU improvements Growing compute demands…



A Cloud-Scale Acceleration Architecture
Adrian Caulfield, Eric Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger, IEEE Computer Society, October 15, 2016, View abstract, Download PDF


A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services (IEEE MICRO Top Pick)
Andrew Putnam, Adrian Caulfield, Eric Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger, in IEEE Micro, IEEE, May 13, 2015, View abstract, Download PDF, View external link












  • Dual B.A/B.S. in Electrical Engineering, Computer Science, and Physics (Triple Major) from the University of San Diego in 2003


  • M.S. and Ph.D. in Computer Science & Engineering from the University of Washington in 2006 and 2009 respectively. Advisors: Susan Eggers and Mark Oskin.