Portrait of Eric Chung

Eric Chung

Senior Researcher


CV 2017

I’m a senior researcher and research manager in the Azure Silicon Systems Futures group, working at the intersection of hardware, applications, and machine learning. From 2013-16, I served as a platform architect for Project Catapult, which pioneered the novel uses and widespread adoption of FPGAs for datacenter acceleration.

Currently I am a co-founder and lead for Project Brainwave, Microsoft’s principal infrastructure for accelerated AI serving in real time using FPGAs. Project Brainwave has been deployed in production cloud-scale services such as Bing and Azure, delivering low cost, low latency inferencing of state-of-the-art DNNs.

Interests: computer architecture, reconfigurable computing, datacenter and cloud, hardware-accelerated machine learning, domain-specific high-level synthesis, FPGA-based simulation methodologies, heterogeneous multicore analytical modeling, and hardware design automation.

I have served as a reviewer, program committee member, and general committee member for major conferences, including ASPLOS, ISCA, MICRO, HPCA, FPGA, and FCCM. I received my Ph.D. at Carnegie Mellon University in 2011 and a B.S. from UC Berkeley in EECS in 2004. Previously, I led the CoRAM and ProtoFlex projects at CMU.