@article{kim2010a, author = {Kim, Joo-Young and Park, Junyoung and Lee, Seungjin and Kim, Minsu and Oh, Jinwook and Yoo, Hoi-Jun}, title = {A 118.4GB/s Multi-Casting Network-on-Chip with Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition}, year = {2010}, month = {July}, abstract = {A 118.4 GB/s multi-casting network-on-chip (MC-NoC) is proposed as communication platform for a real-time object recognition processor. For application-specific NoC design, target traffic patterns are elaborately analyzed. Through topology exploration, we derive a hierarchical star and ring (HS-R) combined architecture for low latency and inter-processor communication. Multi-casting protocol and router are developed to accelerate one-to-many (1-to-N) data transactions. With these two main features, the proposed MC-NoC reduces data transaction time and energy consumption for the target object recognition traffic by 20% and 23%, respectively. The 350 k MC-NoC fabricated in a 0.13 m CMOS process consumes 48 mW at 400 MHz, 1.2 V.}, publisher = {IEEE}, url = {https://www.microsoft.com/en-us/research/publication/a-118-4gbs-multi-casting-network-on-chip-with-hierarchical-star-ring-combined-topology-for-real-time-object-recognition/}, journal = {Journal of Solid-State Circuits}, }