- \n
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- \u674e\u4e1c\u80dc\uff08\u5fae\u8f6f\u4e9a\u6d32\u7814\u7a76\u9662\u9ad8\u7ea7\u7814\u7a76\u5458\uff09<\/li>\n\n\n\n
- \u5b59\u4e3d\u541b\uff08\u5fae\u8f6f\u4e9a\u6d32\u7814\u7a76\u9662\u8d44\u6df1\u5b66\u672f\u5408\u4f5c\u7ecf\u7406\uff09<\/li>\n\n\n\n
- \u9648 \u660a\uff08\u5fae\u8f6f\u4e9a\u6d32\u7814\u7a76\u9662\u5b66\u672f\u5408\u4f5c\u7ecf\u7406\uff09<\/li>\n\n\n\n
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![\"a](\"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2024\/08\/niyi-xu.jpg\")
<\/figure>\n<\/div>\n\n\n\n<\/div>\n\n\n\n\n\u5f90\u5b81\u4eea<\/strong><\/p>\n\n\n\n
\u4e0a\u6d77\u4ea4\u901a\u5927\u5b66<\/p>\n<\/div>\n<\/div>\n\n\n\n\n\n
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<\/p>\n\n\n\n
\n\n\n\n\n\n![\"a](\"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2024\/08\/chixiao-chen.png\")
<\/figure>\n<\/div>\n\n\n\n<\/div>\n\n\n\n\n\u9648\u8fdf\u6653<\/strong><\/p>\n\n\n\n
\u590d\u65e6\u5927\u5b66<\/p>\n<\/div>\n<\/div>\n\n\n\n\n\n
Communication-Aware Cross-Layer Codesign Strategy for Energy Efficient Machine Learning SoC<\/strong><\/p>\n\n\n\n
As the great success of artificial intelligence algorithms, machine learning SoC are becoming a significant type of high-performance processors recently. However, the limited power budget of edge devices cannot support GPUs and intensive DRAM access. The talk will discuss two energy efficient codesign examples to avoid power hungry hardware. First, on-chip incremental learning is performed on an SoC without dedicated backpropagation computing, where algorithm-architecture codesign is involved. Second, low bit-width quantization schemes are applied to computing-in-memory based SoC, where algorithm-circuit codesign is investigated.<\/p>\n\n\n\n\n\n\n\n
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\u9648\u8fdf\u6653\u535a\u58eb\u4e5f\u662f\u77e5\u540d\u534a\u5bfc\u4f53\u516c\u4f17\u53f7\u201c\u77fd\u8bf4\u201d\u7684\u5171\u540c\u521b\u59cb\u4eba\u4e0e\u4e3b\u7b14\u3002<\/p>\n\n\n\n\n\n
\n\n\n\n\n\n![\"a](\"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2024\/08\/jingwen-leng.jpg\")
<\/figure>\n<\/div>\n\n\n\n<\/div>\n\n\n\n\nJingwen Leng<\/strong><\/p>\n\n\n\n
\u4e0a\u6d77\u4ea4\u901a\u5927\u5b66<\/p>\n<\/div>\n<\/div>\n\n\n\n\n\n
Compiler Design and Optimization for DNN Model Serving<\/strong><\/p>\n\n\n\n
Deep neural network has achieved enormous success in many tasks including computer vision and natural language processing. Despite of their high accuracies, DNN models have significant computational cost, as evident by the recent enormous large NLP models such as GPT-3. Thus, it is crucial to provide high-performance serving for these DNN models. In this talk, we will present our work on optimizing the DNN serving from the compiler\u2019s perspective. In particular, we will demonstrate how to compile the interference and conflict tolerant codes in the multi-model serving scenario. Meanwhile, we will also present our thoughts on extending the current DNN system with the instrumentation interface, which opens up the new opportunities for analyzing and optimizing DNN models.<\/p>\n\n\n\n\n\n\n\n
Jingwen Leng is a tenure-track Associate Professor in the CS Department and John Hopcroft CS Center at Shanghai Jiao Tong University. He is currently interested at taking a holistic approach to optimizing the performance, efficiency, and reliability for computer systems, with a focus on the deep learning application. He received his Ph.D. from the University of Texas at Austin, where he focused on improving the efficiency and resiliency of general-purpose GPUs.<\/p>\n\n\n\n\n\n
\n\n\n\n\n\n![\"a](\"https:\/\/www.microsoft.com\/en-us\/research\/wp-content\/uploads\/2024\/08\/chen-xu.jpg\")
<\/figure>\n<\/div>\n\n\n\n<\/div>\n\n\n\n\n\u5f90\u8fb0<\/strong><\/p>\n\n\n\n
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<\/p>\n\n\n\n\n\n
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\n\u5fae\u8f6f\u4e9a\u6d32\u7814\u7a76\u9662<\/td>\n<\/tr>\n\n 14:10 \u2013 14:30<\/td>\n \u6f14\u8bb2: Efficient AI Chips: opportunities and challenges<\/td>\n \u5f90\u5b81\u4eea
\n\u4e0a\u6d77\u4ea4\u901a\u5927\u5b66<\/td>\n<\/tr>\n\n 14:30 \u2013 14:50<\/td>\n \u6f14\u8bb2: Communication-Aware Cross-Layer Codesign Strategy for Energy Efficient Machine Learning SoC<\/td>\n \u9648\u8fdf\u6653
\n\u590d\u65e6\u5927\u5b66<\/td>\n<\/tr>\n\n 14:50 \u2013 15:10<\/td>\n \u6f14\u8bb2: Compiler Design and Optimization for DNN Model Serving<\/td>\n Jingwen Leng
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\n\u5fae\u8f6f\u4e9a\u6d32\u7814\u7a76\u9662<\/td>\n<\/tr>\n\n 15:30 \u2013 15:50<\/td>\n \u6f14\u8bb2: Hybrid Evaluation for Distributed Iterative Matrix Computation<\/td>\n \u5f90\u8fb0
\n\u534e\u4e1c\u5e08\u8303\u5927\u5b66<\/td>\n<\/tr>\n\n 15:50 \u2013 16:10<\/td>\n \u6f14\u8bb2: Deep-Learning Model Sparsity via Tensor-with-Sparsity-Attribute<\/td>\n Ningxin Zheng
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\u590d\u65e6\u5927\u5b66<\/p>\n<\/div>\n<\/div>\n\n\n\n\n\n
Communication-Aware Cross-Layer Codesign Strategy for Energy Efficient Machine Learning SoC<\/strong><\/p>\n\n\n\n
As the great success of artificial intelligence algorithms, machine learning SoC are becoming a significant type of high-performance processors recently. However, the limited power budget of edge devices cannot support GPUs and intensive DRAM access. The talk will discuss two energy efficient codesign examples to avoid power hungry hardware. First, on-chip incremental learning is performed on an SoC without dedicated backpropagation computing, where algorithm-architecture codesign is involved. Second, low bit-width quantization schemes are applied to computing-in-memory based SoC, where algorithm-circuit codesign is investigated.<\/p>\n\n\n\n\n\n\n\n
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\u9648\u8fdf\u6653\u535a\u58eb\u53c2\u4e0e\u9879\u76ee\u5305\u62ec\u56fd\u5bb6\u79d1\u6280\u91cd\u5927\u4e13\u9879\u201c\u9762\u5411IMT-Advanced\u5bbd\u5e26\u65e0\u7ebf\u901a\u4fe1\u7cfb\u7edf\u7684\u6570\u6a21\u6df7\u5408\u96c6\u6210\u7535\u8def\u7814\u53d1\u201d\u3001\u79d1\u6280\u90e8863\u8ba1\u5212\uff08\u73b0\u66f4\u540d\u4e3a\u56fd\u5bb6\u91cd\u70b9\u7814\u53d1\u8ba1\u5212\uff09\u201c\u4e0b\u4e00\u4ee3\u5149\u4f20\u8f93\u7cfb\u7edf\u4e2d\u7684\u9ad8\u901f\u6a21\u6570\u8f6c\u6362\u5668\/\u6570\u6a21\u8f6c\u6362\u5668\u82af\u7247\u548c\u5173\u952e\u6280\u672f\u7814\u7a76\u201d\uff0c\u56fd\u5bb6\u81ea\u7136\u79d1\u5b66\u57fa\u91d1\u9762\u4e0a\u9879\u76ee\u201c\u9002\u7528\u4e8e20-80MHz\u7684\u9ad8\u9891\u8d85\u58f0\u76f8\u63a7\u9635\u7684MEMS\u538b\u7535\u6362\u80fd\u5668\u4e0e\u9ad8\u80fd\u6548\u6a21\u6570\u8f6c\u6362\u5668\u7814\u7a76\u201d\uff0c\u4e0a\u6d77\u5e02\u79d1\u59d4\u57fa\u7840\u7814\u7a76\u9879\u76ee\u201c\u7c7b\u8111\u82af\u7247\u4e0e\u7247\u4e0a\u7cfb\u7edf\u7814\u7a76\u201d\u7b49\u3002\u9648\u8fdf\u6653\u535a\u58eb\u5df2\u53d1\u8868\u8bba\u658740\u4f59\u7bc7\uff0c\u6388\u6743\u4e13\u522910\u4f59\u9879\u3002 \u9648\u8fdf\u6653\u535a\u58eb\u4e8e2014\u5e74\u83b7\u5f97ISSCC STGA\u5956\uff0c\u5e76\u4efbIEEE JSSC\/TCAS-I\/TCAS-II\/JETCAS\u5ba1\u7a3f\u4eba\u3002<\/p>\n\n\n\n
\u9648\u8fdf\u6653\u535a\u58eb\u4e5f\u662f\u77e5\u540d\u534a\u5bfc\u4f53\u516c\u4f17\u53f7\u201c\u77fd\u8bf4\u201d\u7684\u5171\u540c\u521b\u59cb\u4eba\u4e0e\u4e3b\u7b14\u3002<\/p>\n\n\n\n\n\n
\n\n\n\n\n\n<\/figure>\n<\/div>\n\n\n\n<\/div>\n\n\n\n\nJingwen Leng<\/strong><\/p>\n\n\n\n
\u4e0a\u6d77\u4ea4\u901a\u5927\u5b66<\/p>\n<\/div>\n<\/div>\n\n\n\n\n\n
Compiler Design and Optimization for DNN Model Serving<\/strong><\/p>\n\n\n\n
Deep neural network has achieved enormous success in many tasks including computer vision and natural language processing. Despite of their high accuracies, DNN models have significant computational cost, as evident by the recent enormous large NLP models such as GPT-3. Thus, it is crucial to provide high-performance serving for these DNN models. In this talk, we will present our work on optimizing the DNN serving from the compiler\u2019s perspective. In particular, we will demonstrate how to compile the interference and conflict tolerant codes in the multi-model serving scenario. Meanwhile, we will also present our thoughts on extending the current DNN system with the instrumentation interface, which opens up the new opportunities for analyzing and optimizing DNN models.<\/p>\n\n\n\n\n\n\n\n
Jingwen Leng is a tenure-track Associate Professor in the CS Department and John Hopcroft CS Center at Shanghai Jiao Tong University. He is currently interested at taking a holistic approach to optimizing the performance, efficiency, and reliability for computer systems, with a focus on the deep learning application. He received his Ph.D. from the University of Texas at Austin, where he focused on improving the efficiency and resiliency of general-purpose GPUs.<\/p>\n\n\n\n\n\n
\n\n\n\n\n\n<\/figure>\n<\/div>\n\n\n\n<\/div>\n\n\n\n\n\u5f90\u8fb0<\/strong><\/p>\n\n\n\n
\u534e\u4e1c\u5e08\u8303\u5927\u5b66<\/p>\n<\/div>\n<\/div>\n\n\n\n\n\n
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\u5f90\u8fb0\uff0c\u534e\u4e1c\u5e08\u8303\u5927\u5b66\u6570\u636e\u79d1\u5b66\u4e0e\u5de5\u7a0b\u5b66\u9662\u526f\u6559\u6388\u30022014\u5e74-2018\u5e74\u62c5\u4efb\u5fb7\u56fd\u67cf\u6797\u5de5\u4e1a\u5927\u5b66\u9ad8\u7ea7\u7814\u7a76\u52a9\u7406\uff0c\u5728Volker Markl\u6559\u6388\u8bfe\u9898\u7ec4\u4ece\u4e8b\u535a\u58eb\u540e\u7814\u7a76\uff0c\u53c2\u4e0eApache Flink\u7cfb\u7edf\u7684\u7814\u53d1\u30022014\u5e74\u83b7\u534e\u4e1c\u5e08\u8303\u5927\u5b66\u8ba1\u7b97\u673a\u5e94\u7528\u6280\u672f\u535a\u58eb\u5b66\u4f4d\uff0c\u66fe\u4e8e2011\u5e74\u8d74\u6fb3\u5927\u5229\u4e9a\u6606\u58eb\u5170\u5927\u5b66\u77ed\u671f\u8bbf\u95ee\u3002\u4e3b\u8981\u7814\u7a76\u5174\u8da3\u662f\u5927\u89c4\u6a21\u5206\u5e03\u5f0f\u6570\u636e\u5904\u7406\u7cfb\u7edf\u3002<\/p>\n\n\n\n\n\n
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\n \n\u65f6\u95f4<\/th>\n \u4e3b\u9898<\/th>\n \u4e3b\u8bb2\u4eba<\/th>\n<\/tr>\n<\/thead>\n \n 13:30 \u2013 14:00<\/td>\n \u5609\u5bbe\u7b7e\u5230 & \u529e\u516c\u5ba4\u53c2\u89c2<\/td>\n <\/td>\n<\/tr>\n \n 14:00 \u2013 14:10<\/td>\n \u5f00\u573a\u81f4\u8f9e<\/td>\n \u6768\u7389\u5e86
\n\u5fae\u8f6f\u4e9a\u6d32\u7814\u7a76\u9662<\/td>\n<\/tr>\n\n 14:10 \u2013 14:30<\/td>\n \u6f14\u8bb2: Efficient AI Chips: opportunities and challenges<\/td>\n \u5f90\u5b81\u4eea
\n\u4e0a\u6d77\u4ea4\u901a\u5927\u5b66<\/td>\n<\/tr>\n\n 14:30 \u2013 14:50<\/td>\n \u6f14\u8bb2: Communication-Aware Cross-Layer Codesign Strategy for Energy Efficient Machine Learning SoC<\/td>\n \u9648\u8fdf\u6653
\n\u590d\u65e6\u5927\u5b66<\/td>\n<\/tr>\n\n 14:50 \u2013 15:10<\/td>\n \u6f14\u8bb2: Compiler Design and Optimization for DNN Model Serving<\/td>\n Jingwen Leng
\n\u4e0a\u6d77\u4ea4\u901a\u5927\u5b66<\/td>\n<\/tr>\n\n 15:10 \u2013 15:30<\/td>\n \u6f14\u8bb2: Holistic and Scalable Compiler Optimization for Deep Learning<\/td>\n \u859b\u7ee7\u9f99
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