{"id":162328,"date":"2010-07-01T00:00:00","date_gmt":"2010-07-01T00:00:00","guid":{"rendered":"https:\/\/www.microsoft.com\/en-us\/research\/msr-research-item\/a-118-4gbs-multi-casting-network-on-chip-with-hierarchical-star-ring-combined-topology-for-real-time-object-recognition\/"},"modified":"2018-10-16T19:57:58","modified_gmt":"2018-10-17T02:57:58","slug":"a-118-4gbs-multi-casting-network-on-chip-with-hierarchical-star-ring-combined-topology-for-real-time-object-recognition","status":"publish","type":"msr-research-item","link":"https:\/\/www.microsoft.com\/en-us\/research\/publication\/a-118-4gbs-multi-casting-network-on-chip-with-hierarchical-star-ring-combined-topology-for-real-time-object-recognition\/","title":{"rendered":"A 118.4GB\/s Multi-Casting Network-on-Chip with Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition"},"content":{"rendered":"<p>A 118.4 GB\/s multi-casting network-on-chip (MC-NoC) is proposed as communication platform for a real-time object recognition processor. For application-speci\ufb01c NoC design, target traf\ufb01c patterns are elaborately analyzed. Through topology exploration, we derive a hierarchical star and ring (HS-R) combined architecture for low latency and inter-processor communication. Multi-casting protocol and router are developed to accelerate one-to-many (1-to-N) data transactions. With these two main features, the proposed MC-NoC reduces data transaction time and energy consumption for the target object recognition traf\ufb01c by 20% and 23%, respectively. The 350 k MC-NoC fabricated in a 0.13 m CMOS process consumes 48 mW at 400 MHz, 1.2 V.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>A 118.4 GB\/s multi-casting network-on-chip (MC-NoC) is proposed as communication platform for a real-time object recognition processor. For application-speci\ufb01c NoC design, target traf\ufb01c patterns are elaborately analyzed. Through topology exploration, we derive a hierarchical star and ring (HS-R) combined architecture for low latency and inter-processor communication. Multi-casting protocol and router are developed to accelerate one-to-many [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","meta":{"msr-url-field":"","msr-podcast-episode":"","msrModifiedDate":"","msrModifiedDateEnabled":false,"ep_exclude_from_search":false,"_classifai_error":"","msr-author-ordering":null,"msr_publishername":"IEEE","msr_publisher_other":"","msr_booktitle":"","msr_chapter":"","msr_edition":"","msr_editors":"","msr_how_published":"","msr_isbn":"","msr_issue":"","msr_journal":"Journal of Solid-State Circuits","msr_number":"","msr_organization":"","msr_pages_string":"","msr_page_range_start":"","msr_page_range_end":"","msr_series":"","msr_volume":"","msr_copyright":"","msr_conference_name":"","msr_doi":"","msr_arxiv_id":"","msr_s2_paper_id":"","msr_mag_id":"","msr_pubmed_id":"","msr_other_authors":"Junyoung Park, Seungjin Lee, Minsu Kim, Jinwook Oh, Hoi-Jun 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