DDR2 DRAM Controller for BEE3
The distribution consists of: 1) a document describing the design; 2) all Verilog source-code modules required to build the design; 3) a subdirectory containing an assembler for the TC5 RISC processor that is part of the design. Last published: November 25, 2008.
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Version:
1.1
Date Published:
5/15/2024
File Name:
DDRCHv11.zip
File Size:
646.4 KB
The distribution consists of: 1) a document describing the design; 2) all Verilog source-code modules required to build the design; 3) a subdirectory containing an assembler for the TC5 RISC processor that is part of the design. This is a Visual Studio C# program; 4) a Xilinx ISE Project File that builds the design; and 5) a Readme.txt file that describes how to install and use the design.Supported Operating Systems
Windows 10, Windows 7, Windows 8
- Windows 7, Windows 8, or Windows 10
- Click Download and follow the instructions.