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Project ClickNP

Established: July 7, 2015

ClickNP is a programming model/language for modularized packet processing on FPGA-accelerated servers. ClickNP is designed with the following four goals:

  • Flexibility. ClickNP fully programs using high-level languages. Developers program with high-level abstractions and familiar tools, and have similar programming experience as if programming on a multi-core processor.
  • Modularized. ClickNP adopts a modular architecture for packet processing. Previous experiences on virtualized NFs have demonstrated that a right modular architecture can well capture many common functionalities in packet processing, making them easy to reuse in various NFs.
  • High performance and low latency. ClickNP can process packets at the line-rate of 40Gbps with common NFs.
  • Support joint CPU/FPGA process. ClickNP has built-in support for fast CPU/FPGA communication that allows fine-grained processing separation between CPU and FPGA.