Functional programming on the GRIP multiprocessor

IEE Seminar on Digital Parallel Processors, Lisbon, Portugal |

Published by IEE

Most MIMD computer architectures can be classified as tightly-coupled or loosely-coupled, depending on the relative latencies seen by a processor accessing different parts of its address space. By adding microprogrammable functionality to the memory units, the authors have developed a MIMD computer architecture which explores the middle region of this spectrum. This has resulted in an unusual and flexible bus-based multiprocessor, which is being used as a base for research in parallel functional programming languages. The authors introduce parallel functional programming, and describe the architecture of the GRIP multiprocessor