Cooperative Data and Computation Partitioning for Distributed Architectures

May 10, 2007
Mike Chu | University of Michigan

The recent design shift towards chip multiprocessors has spawned a
significant amount of research in the area of program parallelization.
Performance gains in the future will require programmer and compiler
intervention to increase the amount of parallel work possible. The future
abundance of cores on a single chip offers many possibilities in ways to
exploit the underlying parallel resources. Much of the recent work in
this area has fallen into the areas of coarse-grain parallelization by the
programmer with new programming models, such as transactional memory, and
different ways to exploit threads and data-level parallelization.

In this talk, I will focus on a different angle for increasing the
available parallelism to the cores: compiler techniques to detect and
exploit fine-grain parallelism. This technique creates fine-grain threads
by partitioning code at the granularity of individual operations and data
across multiple cores and caches. First, I will present a profile-guided
method for partitioning memory accesses that intelligently disperses data
across multiple caches to minimize coherence traffic, while balancing the
working set demands on each cache. Next, I will describe a method for
partitioning the computation of a program across multiple cores that
creates a set fine-grain threads which directly communicate scalar values.
Finally, I will show how these methods synergistically combine and discuss
future directions in this area.

Speaker Details

Michael Chu is currently a member of the Compiler Creating Custom Processors research group in the EECS Department at the University of Michigan, where he received his B.S.E. in 2001, M.S.E. in 2003, and will receive his Ph.D in 2007. His research interests lie in the areas of compilers and the interactions between compilers and computer architecture. More specifically, his focus is on automatic parallelization techniques, memory system optimizations, and the compiler implications for future multicore systems. Michael is also one of the primary developers of Trimaran, a research compiler used by more than 50 universities worldwide.