LogTM: Log-based Transactional Memory

October 7, 2005
Mark Hill | University of Wisconsin-Madison

TRANSACTIONAL MEMORY (TM) aims to simplify parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes providing version management for the simultaneous storage of both new data (to be visible if the transaction commits) and old data (retained if the transaction aborts). Especially after cache overflows, most (hardware) TM systems leave the old value “in place” (the target memory address) and buffer the new value elsewhere until commit. This follows the practice of the few database management systems (DBMSs) that use optimistic concurrency control, but makes commits slower than aborts.

In this talk, we present a new implementation of transactional memory, LOG-BASED TRANSACTIONAL MEMORY (LogTM), that responds to a store by writing the old value elsewhere (to a per-thread log in cacheable virtual memory) and writing the new value in place. This follows the practice of the vast majority of DBMSs whose conservative concurrency control algorithms make commits faster than aborts. We support this design decision with experiments that find aborts are uncommon (1-2% for most of our benchmarks) and that small buffers can hide most of the overhead of creating the log. Moreover, LogTM also contributes a gracefully, lazy method of handling cache evictions of transactional data and allows flexible (library) software to manage aborts.

As time permits, we will discuss other results of the WISCONSIN MULTIFACET PROJECT (http://www.cs.wisc.edu/multifacet/), co-led by Mark Hill and David Wood.

Speaker Details

MARK D. HILL (http://www.cs.wisc.edu/~markhill) is professor in both the computer sciences department and the electrical and computer engineering department at the University of Wisconsin-Madison, where he also co-leds the Wisconsin Multifacet (http://www.cs.wisc.edu/multifacet/) project with David Wood. His research interests include parallel computer system design, memory system design, and computer simulation. He earned a PhD from University of California, Berkeley. He is an ACM Fellow and a Fellow of the IEEE.