Candidate Talk: Reconfigurable Computing: Architectural and Design Tool Challenges

  • Ken Eguro | University of Washington

Although reconfigurable computing promises huge performance benefits for a wide range of different applications, there are many factors that have limited its effectiveness so far. Perhaps most concerning, current generation commercial FPGA architectures and design tools simply do not provide adequate support for these types of applications.

In this talk we will discuss the details of reconfigurable computing and FPGA architectures. I will present some of the architectural and CAD tool limitations that reconfigurable computing applications pose and discuss some solutions that I have developed: register-enhanced architectures, pipeline-aware timing-driven placement, and pipeline-aware routing.

Speaker Details

Ken Eguro is a Ph.D. candidate at the University of Washington Department of Electrical Engineering (expected completion 8/08). His research focuses on FPGA applications, high performance computing architectures, VLSI CAD tools and optimization algorithms.

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