Computer Architecture Group

Established: November 16, 2006

Our group’s mission is to conduct fundamental research in computer architecture and hardware/software interaction. We explore novel architectural techniques to improve the performance, efficiency, dependability, and scalability of processor architectures and the software running on them. We are especially interested in understanding and improving the interactions between hardware and software.

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Compression Accelerators

Established: June 16, 2014

Data compression is essential to large-scale data centers to save both storage and network bandwidth. Current software based method suffers from high computational cost with limited performance. In this project, we are migrating the fundamental workload of the computer system…

E2

Achieving the right balance of power and performance for an application is challenging with today's multicore processors. E2 solves this problem by providing the capability for cores to dynamically adapt their resources during execution to provide highly efficient power/performance hardware…

BEE3

Established: February 26, 2008

The BEE3 (Berkeley Emulation Engine, version 3) is a multi-FPGA system with up to 64 GB of DRAM and several I/O subsystems that can be used to enable faster, larger and higher fidelity computer architecture or other systems research.