Portrait of Eric Chung

Eric Chung

Researcher

About

I am a Researcher in the Microsoft Research Technologies (MSR-T) lab.  I am a member of the Catapult team and am broadly interested in the application, programmability, and design of specialized hardware (such as FPGAs) in the datacenter. I received my PhD at Carnegie Mellon in 2011 and my BS in EECS at UC Berkeley in 2004.

Projects

Project Catapult

Established: February 2, 2015

Project Catapult is a Microsoft venture that investigates the use of field-programmable gate arrays (FPGAs) to improve performance, reduce power consumption, and provide new capabilities in the datacenter. We have designed an FPGA board that plugs into the Microsoft-designed server…

Publications

2015

2014

A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services
Andrew Putnam, Adrian Caulfield, Eric Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, Eric Peterson, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger, Jim Larus, Gopi Prashanth Gopal, Simon Pope, in 41st Annual International Symposium on Computer Architecture (ISCA), June 1, 2014, View abstract, Download PDF

Projects

Other

CV

Service

  • Program committees – ASBD’14, FCCM’14, SBAC-PAD’14, CARL’13, FCCM’13, FCCM’12
  • External committees – MICRO’14, MICRO’12
  • External reviewer – MICRO, HPCA, ASPLOS, FCCM, TRETS, CARL, CASES, HIPEAC, TPDS
  • Publications Chair – ISCA’14

Contributions

Selected Publications

Selected Talks and Tutorials

  • RAMP Simulator Tutorial: Protoflex, FAST, HAsim, and RAMP-GoldHeld in conjunction with ISPASS-2010, March 28, 2010.
  • Open Source Protoflex SimulatorRAMP summer retreat at UT Austin, Austin, TX, 6/09.
  • Accelerating Architectural-Level Full-System Simulations Using FPGAsGuest speaker at Microsoft Research, Redmond, CA, 10/07.
  • Architectural Emulation on FPGAs Made Easy with Bluespec1st Bluespec Workshop at MIT, Boston, MA, 8/07.
  • Combining Simulators and FPGAs: “An Out-of-Body Experience”RAMP summer retreat at MIT, Boston, MA, 6/06.